Transducer arrays are utilized in many applications. Print heads for inkjet or 3D printers are one widespread application, for example. Transducer arrays also find application in ultrasonic imaging. Transducer arrays often employ capacitive or piezoelectric transducer elements. Generally, a piezoelectric transducer element includes a piezoelectric membrane capable of mechanical deflection of the membrane in response to a time-varying driving voltage. For print heads, the membrane is driven to expel ink or other fluid in a controllable manner, for ultrasonic piezoelectric transducer devices the membrane is driven to generate a high frequency pressure wave in a propagation medium (e.g., air, water, or body tissue) in contact with an exposed outer surface of the transducer element. This high frequency pressure wave can propagate into other media. The same piezoelectric membrane can also receive reflected pressure waves from the propagation media and convert the received pressure waves into electrical signals. The electrical signals can be processed in conjunction with the driving voltage signals to obtain information on variations of density or elastic modulus in the propagation media.
While many transducer devices that use piezoelectric membranes may be formed by mechanically dicing a bulk piezoelectric material or by injection molding a carrier material infused with piezoelectric ceramic crystals, devices can be advantageously fabricated inexpensively to exceedingly high dimensional tolerances using various micromachining techniques (e.g., material deposition, lithographic patterning, feature formation by etching, etc.), commonly referred to a piezoelectric micromachined transducers (pMUT), and more specifically a piezoelectric micromachined ultrasonic transducer (pMUT) when configured for ultrasonic transduction.
One-dimensional (1D) pMUT arrays are commonly employed where n channels are provided and each of the n channels addresses m pMUT devices as a single population. During operation of the array, a given one of the n channels is in a drive or sense mode with potentials being applied or sensed from a channel coupled in electrical parallel to m pMUT devices. Signals to/from the n channels of the 1D array may then be achieved through a multiplexing technique, such as time delayed scanning.
FIG. 1A illustrates a 1D array 100 having a plurality of channels 110, 120, 130, 140 disposed over an area defined by a first dimension, x and a second dimension y, of a substrate 101. Each of the channels (e.g., 110) is electrically addressable as one of n channels independently from any other drive/sense channels (e.g., 120 or 130) with the drive/sense channel addressing each of the elements 110A, 110B . . . 110L. A reference (e.g., ground) electrode rail is also typically found in a plane below the drive/sense channel routing. The drive/sense channels 110, 120 represent a repeating cell in the 1D array 100 with the first drive/sense channel 110 coupled to a first bus 127 and the adjacent drive/sense channel 120 coupled a second bus 128 to form a interdigitated finger structure. The drive/sense channels 130, 140 repeat the interdigitated unit structure with additional cells forming a 1D electrode array of arbitrary size (e.g., 128 channels, 256 channels, etc.).
Fully addressable two-dimensional (2D) piezoelectric arrays would offer a number of technical advantages over 1D arrays. For example, in the context of ultrasonic imagers, three-dimensional (3D) imaging becomes possible. Enhanced functionality stemming from the additional degree of freedom provided by transducer element-level addressing is also advantageous in printing and a myriad of other contexts. However, addressing individual pMUT devices within a 2D array is technically challenging because the sheer number of channels scales rapidly, requiring complex device interconnection and multi-layered flex assemblies between the arrayed pMUT device (e.g., print head, ultrasonic transducer head, etc.) and the electrical control/sampling circuitry, often implemented in CMOS, off the transducer substrate. As an example of such an architecture, FIG. 1B is a cross-sectional side view of the 1D pMUT array 100, disposed on the substrate 101 and coupled by a flex cable extending off the substrate 101 to an ASIC (CMOS) controller 112. With such an architecture, increasing complexity in the pMUT device array and/or control of the transducer elements incurs significant overhead off the array substrate.